Rambus XDR2的Micro-Threaded Core蠻有趣的

XDR2 Micro-Threaded Core
Micro-threaded Row and Column Operations in a DRAM Core

"Micro-threading works by partitioning a traditional 8-bank CMOS DRAM core into 16 independently addressable banks. In today's memory devices, a single column access uses resources on both halves of the DRAM. An XDR2 DRAM device, however, accesses only small portions of data per column access, allowing finer access granularity and increased effective bandwidth."

"This granularity problem may be addressed with the architectural technique of “micro-threading”. This technique permits several small accesses to take the place of a single large access. This requires some modification to the interface of the DRAM, but does not add significant cost for many DRAM cores. In many cores multiple independent row decode circuits and multiple independent column decode circuits are already present."

不知道這樣會增加多少成本.... 很久沒去研究記憶體架構了。